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Open Engineering Terms

Terms & Conditions

Last updated: August 2026 • Please read these terms carefully before building hardware or utilizing simulation models.

Home › Terms of Service

Terms Index

1. Acceptance 2. Open-Source Licensing 3. High-Voltage Safety Warning 4. Simulation Accuracy 5. Attribution & IP 6. Governing Law

1. Acceptance of Terms

By accessing, browsing, or utilizing the educational resources, mathematical calculators, and hardware schematics on Pulse TechX ("the Platform"), you agree to be bound by these Terms and Conditions. If you do not agree with any part of these terms, please discontinue use of the platform.

2. Open-Source Hardware & Firmware Licensing

Software firmware examples (TI C2000 TMS320F28379D register setups, MATLAB/Simulink models, Space Vector PWM code) are distributed under the **MIT License**.

Hardware schematics, Gerber files, and PCB layouts published on our official GitHub repositories are licensed under the **CERN Open Hardware Licence (CERN-OHL-P)**. You are free to study, modify, and build upon these designs for research and commercial prototypes with appropriate author attribution.

3. Critical High-Voltage Electrical Safety Disclaimer

⚡ DANGER: HIGH VOLTAGE HAZARD (>400V DC)

Power Electronics systems (including solar inverters, boost converters, isolated gate drivers, and lithium battery banks) involve lethal DC-bus voltages exceeding 400V DC and continuous currents exceeding 20A.

  • Physical prototyping should be executed ONLY by trained electrical engineering personnel equipped with proper PPE, isolated differential probes, and current-limited isolated power supplies.
  • Pulse TechX and its creators (Antu Roy and Bapi Biswas) disclaim all liability for physical injuries, semiconductor destruction, or laboratory fire hazards resulting from hardware replication.

4. Simulation Accuracy & Engineering Disclaimers

The interactive web calculators (LCL filter, Duty Cycle, Heatsink thermal calculations) are provided for educational estimation purposes. Real-world PCB layout parasitics (trace inductance $L_s$, MOSFET gate-loop ringing, and magnetic core saturation) must always be independently validated in lab bench environments.

5. Attribution & Community Contributions

When reproducing Pulse TechX circuits or referencing our derivations in academic capstone papers or conference publications, please cite the platform:

Roy, A., & Biswas, B. (2026). PulseTech: Open Power Electronics & C2000 DSP Architecture. https://pulsetechx.in

6. Governing Law & Jurisdiction

These terms are governed by and construed in accordance with the laws of India. Any disputes arising in connection with the platform shall be subject to the exclusive jurisdiction of the competent courts in India.

Research & Open Hardware

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Antu Roy Power Electronics & DSP Lead
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